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FPGA-Core/FPGA/vivado/.gitignore
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# Vivado-generated project state. The committed source of truth is
# create_project.tcl — everything below (including the .xpr itself, which
# embeds machine-specific paths) is regenerated by running that script.
# The project file itself — regenerated from create_project.tcl
*.xpr
# Project-wide generated directories (named after the .xpr basename)
*.cache/
*.hw/
*.sim/
*.runs/
*.ip_user_files/
*.gen/
*.srcs/
# Vivado scratch / temp
.Xil/
xsim.dir/
# Logs, journals, autosave backups
*.jou
*.log
*.str
*.backup.*
*.wdb
*.pb
vivado*.jou
vivado*.log
# Webtalk telemetry
webtalk*.jou
webtalk*.log
usage_statistics_webtalk.*