FPGA-Core/Tutorial/phase-18-privilege-sv32/phase-18.md

Phase 18 - S-Mode, U-Mode, Sv32 Virtual Memory

Context

Linux normally runs with privilege separation and virtual memory. This phase adds supervisor/user modes and Sv32 address translation.

Goals

• Add supervisor and user privilege modes.
• Implement Sv32 page-table walking.
• Add S-mode CSRs and page-fault traps.

New Concepts

• Privilege mode: execution level controlling access rights.
• S-mode: supervisor mode, where the OS kernel normally runs.
• U-mode: user mode, where applications normally run.
• MMU: memory management unit performing address translation and protection.
• Sv32: RISC-V 32-bit virtual-memory scheme with two-level page tables.
• TLB: translation lookaside buffer, cache of recent address translations.

How To Think About It

Virtual memory is both translation and permission checking. A correct page walker that ignores permissions is not enough for an OS.

Learning Tasks

• Draw Sv32 virtual address fields, page table levels, and PTE format.
• Trace one virtual load through translation to physical memory.
• Learn which traps are page faults versus access faults.

Pitfalls

• Confusing physical memory protection with virtual page permissions.
• Mishandling satp updates and sfence.vma.
• Letting user mode access supervisor-only pages.

Tooling And Testing

• Start with hand-built page tables and one mapped page.
• Test instruction, load, and store page faults separately.
• Add trace visibility for virtual address, PTEs, physical address, and cause.

References

• RISC-V privileged architecture spec, Sv32: https://riscv.org/technical/specifications/
• Linux memory-management docs: https://docs.kernel.org/mm/
• OSDev paging overview: https://wiki.osdev.org/Paging