imple
b008b37d49
Add a Tutorial tree that mirrors the roadmap from Phase 0 through Linux bring-up. Each phase and subphase gets a short learning note with consistent sections for context, goals, new concepts, mental model, learning tasks, pitfalls, tooling, testing, and references. The tutorial material is intentionally explanatory rather than implementation code. It gives a systems-oriented learner enough FPGA, SystemVerilog, RISC-V, firmware, and Linux bring-up context to approach each roadmap phase without turning the notes into copy-paste RTL.
52 lines
1.7 KiB
Markdown
52 lines
1.7 KiB
Markdown
# Phase 15 - S-Mode, U-Mode, Sv32 Virtual Memory
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## Context
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Linux normally runs with privilege separation and virtual memory. This phase adds
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supervisor/user modes and Sv32 address translation.
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## Goals
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- Add supervisor and user privilege modes.
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- Implement Sv32 page-table walking.
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- Add S-mode CSRs and page-fault traps.
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## New Concepts
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- Privilege mode: execution level controlling access rights.
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- S-mode: supervisor mode, where the OS kernel normally runs.
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- U-mode: user mode, where applications normally run.
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- MMU: memory management unit performing address translation and protection.
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- Sv32: RISC-V 32-bit virtual-memory scheme with two-level page tables.
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- TLB: translation lookaside buffer, cache of recent address translations.
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## How To Think About It
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Virtual memory is both translation and permission checking. A correct page walker that
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ignores permissions is not enough for an OS.
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## Learning Tasks
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- Draw Sv32 virtual address fields, page table levels, and PTE format.
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- Trace one virtual load through translation to physical memory.
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- Learn which traps are page faults versus access faults.
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## Pitfalls
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- Confusing physical memory protection with virtual page permissions.
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- Mishandling `satp` updates and `sfence.vma`.
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- Letting user mode access supervisor-only pages.
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## Tooling And Testing
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- Start with hand-built page tables and one mapped page.
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- Test instruction, load, and store page faults separately.
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- Add trace visibility for virtual address, PTEs, physical address, and cause.
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## References
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- RISC-V privileged architecture spec, Sv32: https://riscv.org/technical/specifications/
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- Linux memory-management docs: https://docs.kernel.org/mm/
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- OSDev paging overview: https://wiki.osdev.org/Paging
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