1.8 KiB
1.8 KiB
FPGA-Core Tutorial
This tutorial tree follows ROADMAP.md. Each phase and subphase has a learning note
with the same structure:
- Context
- Goals
- New Concepts
- How To Think About It
- Learning Tasks
- Pitfalls
- Tooling And Testing
- References
The notes assume strong Linux/systems experience and beginner-to-intermediate FPGA and digital-design experience. They intentionally avoid giving implementation code. The goal is to explain what to learn, what to verify, and what mistakes to avoid.
Phase Index
- Phase 0 - Architecture Contract
- Phase 1 - ALU + M Unit
- Phase 2 - Register File
- Phase 3 - Decoder
- Phase 4 - First CPU
- Phase 5 - Branches And Jumps
- Phase 6 - Load/Store
- Phase 7 - Memory-Mapped UART
- Phase 8 - GCC Toolchain Integration
- Phase 9 - GCC-Built BIOS / Serial Monitor
- Phase 10 - Minimal ELF Loader
- Phase 11 - Tiny Kernel + Command Shell
- Phase 12 - CSRs + M-Mode Traps
- Phase 13 - Timer
- Phase 14 - Interrupt Controller
- Phase 15 - Atomics
- Phase 16 - Pipeline
- Phase 17 - SPI Flash + DRAM
- Phase 18 - M/S/U + Sv32
- Phase 19 - Linux Boot Contract
- Phase 20 - Linux