# Phase 7.4 - Hello World

## Context

This is the first user-visible proof that software running on your CPU can communicate
with the outside world through MMIO.

## Goals

- Run a hand-written assembly program from instruction BRAM.
- Poll UART status and write bytes to TX data.
- Verify output in a terminal.

## New Concepts

- Polling: repeatedly reading status until a condition is true.
- Firmware: low-level software running directly on the hardware.
- Memory-mapped register access: using load/store instructions to control a device.

## How To Think About It

This milestone tests the full vertical slice: instruction fetch, decode, ALU, branches,
loads/stores, bus decode, UART, board pinout, and terminal settings.

## Learning Tasks

- Trace each instruction in the polling loop.
- Explain why the program waits for `tx_busy` to clear.
- Identify every hardware block involved in printing one character.

## Pitfalls

- Terminal configured for the wrong baud or line settings.
- Writing bytes without checking busy status.
- Debugging UART first when the actual bug is branch/load/store behavior.

## Tooling And Testing

- First verify UART standalone.
- In hardware, probe UART status and D-bus writes if the terminal is silent.
- Keep the program tiny and deterministic.

## References

- RISC-V assembly manual: https://github.com/riscv-non-isa/riscv-asm-manual
- Digilent Arty A7 reference: https://digilent.com/reference/programmable-logic/arty-a7/reference-manual
- UART overview: https://en.wikipedia.org/wiki/Universal_asynchronous_receiver-transmitter