# Phase 6.2 - Byte And Halfword Access

## Context

Sub-word memory operations make C programs practical. `char`, `short`, strings, and packed
data all depend on byte and halfword accesses.

## Goals

- Implement `lb`, `lbu`, `lh`, `lhu`, `sb`, and `sh`.
- Handle byte lanes and sign/zero extension.
- Trap misaligned accesses locally in the LSU.

## New Concepts

- Sign extension: preserving negative value when widening a smaller signed type.
- Zero extension: widening an unsigned value by filling high bits with zero.
- Byte enable: control bit selecting which byte lane is written.
- Misaligned access: address not divisible by the access size.

## How To Think About It

Stores are about choosing byte lanes. Loads are about extracting the correct lane and
extending it correctly. Misalignment is known before the bus request starts.

## Learning Tasks

- Map address low bits to byte lanes.
- Work through examples loading `0x80` as signed and unsigned byte.
- Decide how halfword alignment is detected.

## Pitfalls

- Applying sign extension before selecting the correct byte/halfword.
- Letting a misaligned request reach memory.
- Confusing endianness with bit numbering in diagrams.

## Tooling And Testing

- Test every byte offset for `sb` and `lb/lbu`.
- Test halfword offsets 0 and 2 as legal and 1 and 3 as misaligned.
- Use memory initialization patterns that make byte order obvious.

## References

- RISC-V unprivileged ISA load/store chapter: https://riscv.org/technical/specifications/
- Endianness overview: https://en.wikipedia.org/wiki/Endianness
- Project F memory articles: https://projectf.io/posts/