Replace stale tutorial reference links

Tutorial/phase-10-timer/phase-10.md

@@ -44,6 +44,5 @@ coordinate compare logic, pending state, enable bits, global interrupt enable, a
 ## References
 
 - RISC-V privileged architecture spec: https://riscv.org/technical/specifications/
-- RISC-V ACLINT specification: https://github.com/riscv-non-isa/riscv-aclint
+- RISC-V ACLINT specification: https://github.com/riscvarchive/riscv-aclint
 - Linux timekeeping background: https://docs.kernel.org/timers/
-