Add FPGA project workspace layout

Tutorial/phase-00-architecture-contract/phase-00-02-block-diagram.md

@@ -37,7 +37,7 @@ state stored, what changes each clock, what can wait, and what happens on an exc
 
 ## Tooling And Testing
 
-- Keep the diagram in `docs/` and update it when interfaces change.
+- Keep the diagram in `Docs/` and update it when interfaces change.
 - Compare waveform signal names against the diagram after each integration phase.
 - Use the diagram as a checklist when adding ILA probes.